Generally, non-volatile memory devices may be classified as floating gate or charge trap type memory devices based on the structure of their unit cells.
The charge trap type memory device may include a tunnel insulating layer with silicon oxide, a charge-trapping layer, a blocking layer and a conductive electrode that are sequentially formed on a semiconductor substrate. The charge trap type memory device may perform a programming operation or an erasing operation by storing/discharging charges in/from the charge-trapping layer between the conductive electrode and the semiconductor substrate. The charges may be stored in a deep level trap of the charge-trapping layer. Thus, the tunnel insulating layer may be relatively thin. With a thin tunnel insulating layer, the charge trap type memory device may be operated at a relatively low operational voltage and which may simplify peripheral circuit structures and enable higher integration density.
In order to improve electrical characteristics, such as a threshold voltage characteristic of the charge trap type memory device, division of the charge-trapping layer including silicon nitride into unit cells like a floating gate may be desirable. This approach may inhibit lateral migration of the charges in the charge-trapping layer. To further inhibit the lateral migrations of charges, the charge-trapping layer may be patterned with an isolation layer. However, the charge-trapping layer may be damaged during the patterning process and result in deteriorated electrical characteristics.